Internal pins in Liberty files

Users
1

Currently, read_liberty errors out on internal pins, which I believe should just be ignored. An example of this is the IQ pin in the ASAP7 ICG clock gate cells., where we get

ERROR: Missing function on output IQ of cell ICGx1_ASAP7_75t_L.

You can do -ignore_miss_func, but it will skip importing the entire cell, rather than importing it with that pin disregarded.

I noticed that this issue touches on this topic, but it seems to have been closed and marked completed without any noticeable change to frontends/liberty/liberty.cc (specifically, the place where that error is raised ignores inout cells but not internal ones).

2

We don’t have anything for modeling statetable-based cells either, so read_liberty can’t model this cell. By default it tries to model cell logic and if it fails it errors out, or you can skip cells that it can’t model, or you can use read_liberty -lib to create empty blackboxes that don’t model cell logic and only model interfaces. If I’m reading it right, ASAP7, just like SKY130, uses both statetable and internal pins only for clock gating cells. If you have an example PDK where read_liberty should actually be able to model a cell that uses either statable or internal pins, let us know