Write_firrtl fails

Hey I’m just giving basic flipflop design to yosys and tried generating cpp code using cxxrtl and fir using firrtl
Error i see when i use
write_cxxrtl
ERROR: Unsupported internal cell `$DFFE_PP0P’.

write_firrtl
ERROR: Cell type not supported: $DFFE_PP0P (ebufff.$auto$ff.cc:266:slice$91)

is this support still need to be added ? or anyway i can restrict map to other _DFF type which is supported for CXXRTL, FIRRTL after synth ?

I got reply at Slack that
It would be good if we use before synth/techmap for cxxrtl

is it same for write_firrtl

Yes, it does seem to be. Only a handful of fine-grained cells are supported in the FIRRTL backend