Incremental Synthesis in Yosys

Users
1

I see vivado and altera supports incremental synthesis in their flow

vivado has DCP(Design checkpoints ) that will be used while re-synthesizing and users base mention that it is effective when there is change of atmost 15% in file

In one of the dicussion Using make and git but Does this hack truely same as resynth as vivado dcp ?

does present yosys supports incremental synth , is it in your pipeline or how can we implement this ?

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2

Yosys does not support incremental synthesis. I don’t have any experience with what is being referenced in the discussion you linked to, but I do have some idea of what might it might be meaning (at least the make part, I don’t see how git comes into it). Say you have two modules, m1 and m2, in two separate source files, m1.v and m2.v. You then have some Yosys script which performs some pre processing/early synthesis, and dumps out the rtlil:

proc
opt
wreduce

# or if m1 and m2 require different pre-processing
read_verilog m1.v
hierarchy -top m1
proc
opt
write_rtlil m1.il

And then in the makefile you tell Yosys to read the input file (%.v in the target, $< in the recipe), run the script (early.ys), and write the output file (%.il in the target, $@ in the recipe):

%.il: %.v early.ys
	yosys early.ys $< -o $@

# or if m1 and m2 require different pre-processing
m1.il: m1.v m1.ys
	yosys m1.ys
m2.il: m2.v m2.ys
	yosys m2.ys

Then you have some second script, which loads all of the intermediate rtlil files, performs the remainder of the synthesis, and writes the output:

read_rtlil m1.il m2.il
hierarchy -top top
flatten
opt
techmap
write_json final.json

And in the makefile:

final.json: m1.il m2.il final.ys
	yosys final.ys

The first time you want to synthesize final.json, you run Yosys three times; once for each of m1.v and m2.v, and then once for the final design. If you modify m1.v, you then only need to run Yosys again twice and can skip the m2.v → m2.il, since it hasn’t changed. Running synthesis in this way will take longer when synthesizing the complete design, but the more you’re able to perform on each module, and the more modules you have, the more time saving you could potentially gain.

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3

Thank you for the answer @KrystalDelusion !
Will yosys support resynth (caching ) in future ? is it in your pipeline

I see issue this approach can take a toll while doing global optimisation

There is one good approach i found here

4

There are no concrete plans for supporting incremental synthesis to my knowledge, but it is something we are aware of and may receive more attention down the line.

5

Sure!
Thank you @KrystalDelusion